Physical Design Engineer at OpenAI — task breakdown

Physical Design Engineer | OpenAI Careers ## Physical Design Engineer Hardware - San Francisco Apply now(opens in a new window) **About the Team**OpenAI’s Hardware team designs the custom silicon that powers the world’s most advanced AI systems. From system-level architecture to custom circuit implementations, we partner closely with model and infrastructure teams to deliver performance, power, and efficiency breakthroughs across all layers of the stack. **About the Role** We are seeking a highly skilled Physical Design Engineer with deep expertise in physical design and methodology. This individual contributor role sits within our physical design team and is central to delivering power, performance, and area (PPA) optimized datapath and interconnect solutions for next-generation AI accelerators. You’ll work closely with RTL designers to define and execute on physical design strategies. You will develop tools, flows and methodologies to increase team productivity. Your work will directly impact silicon’s performance and cost efficiency, as well as the team’s execution velocity and quality. **In this role, you will:** * Develop, build and own tools, flows and methodologies for physical implementation * Own physical implementation of floorplan blocks from floorplanning to final signoff * Collaborate with RTL designers to drive optimal block implementation solutions * Analyze and optimize design for timing, power, and area trade-offs, working in collaboration with EDA vendors and ASIC partners **Qualifications:** * BS w/ 4+ or MS with 2+ years or PhD with 0-1 year(s) of relevant industry experience in physical design and methodology development * Demonstrated success in taping out complex silicon designs * Hands-on experience with block physical implementation and PPA convergence * Strong coding experience with python, bazel, TCL * Strong experience building physical design tools, flows and methodologies * Strong understanding of microarchitecture, RTL design, physical design, circuit design, physical verification and timing closure. * Deep familiarity with industry-standard tools and flows for physical synthesis, PNR, LEC and power estimation **Bonus:** * Experience with AI or HPC-focused chips * Experience with optimizing PPA for high performance compute cores * Hands-on experience with top-level design methodologies *To comply with U.S. export control laws and regulations, candidates for this role may need to meet certain legal status requirements as provided in those laws and regulations.* **About OpenAI** OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and human needs at its core, and to achieve our mission, we must encompass and value the many different perspectives, voices, and experiences that form the full spectrum of humanity. We are an equal opportunity employer, and we do not discriminate on the basis of race, religion, color, national origin, sex, sexual orientation, age, veteran status, disability, genetic information, or other applicable legally protected characteristic. For additional information, please see OpenAI’s Affirmative Action and Equal Employment Opportunity Policy Statement. Background checks for applicants will be administered in accordance with applicable law, and qualified applicants with arrest or conviction records will be considered for employment consistent with those laws, including the San Francisco Fair Chance Ordinance, the Los Angeles County Fair Chance Ordinance for Employers, and the California Fair Chance Act, for US-based candidates. For unincorporated Los Angeles County workers: we reasonably believe that criminal history may have a direct, ad

Physical Design Engineer

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